Design and statistical analysis of low power and high speed 10T static random access memory cell.
Govind PrasadNeha KumariBipin Chandra MandiMaifuz AliPublished in: Int. J. Circuit Theory Appl. (2020)
Keyphrases
- low power
- high speed
- single chip
- statistical analysis
- low power consumption
- vlsi architecture
- low cost
- power consumption
- logic circuits
- digital signal processing
- mixed signal
- gate array
- cmos technology
- design considerations
- power dissipation
- nm technology
- power reduction
- ultra low power
- real time
- design process
- low voltage
- power management
- random access memory
- markov random field
- data structure