Quasi Delay-Insensitive High Speed Two-Phase Protocol Asynchronous Wrapper for Network on Chips.
Xu-Guang GuanXing-Yuan TongYin-Tang YangPublished in: J. Comput. Sci. Technol. (2010)
Keyphrases
- delay insensitive
- high speed
- low power
- high speed networks
- asynchronous circuits
- network protocols
- wireless sensor networks
- communication protocol
- feature selection
- network structure
- network simulator
- tcp ip
- peer to peer
- real time
- low cost
- residual energy
- protocol stack
- state machines
- shift register
- neural network
- recurrent networks
- data availability
- computer networks
- internet protocol
- mobile nodes
- network management
- communication networks
- information extraction
- file transfer