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A PRET microarchitecture implementation with repeatable timing and competitive performance.

Isaac LiuJan ReinekeDavid BromanMichael ZimmerEdward A. Lee
Published in: ICCD (2012)
Keyphrases
  • circuit design
  • early stage
  • efficient implementation
  • neural network
  • learning algorithm
  • implementation issues
  • real time
  • knowledge base
  • image processing
  • multiscale
  • hardware implementation