Design of low power approximate floating-point adders.

Reza Omidi Sepehr Sharifzadeh

Published in: Int. J. Circuit Theory Appl. (2021)

Keyphrases

low power
floating point
single chip
power consumption
low cost
low power consumption
high speed
power dissipation
vlsi architecture
digital signal processing
cmos technology
logic circuits
gate array
ultra low power
mixed signal
fixed point
high power
power reduction
real time
markov random field