The impact of clock gating schemes on the power dissipation of synthesizable register files.
Matthias MüllerAndreas WortmannSven SimonMichael KugelTim SchoenauerPublished in: ISCAS (2) (2004)
Keyphrases
- power dissipation
- power reduction
- power consumption
- low power
- clock gating
- digital signal processing
- finite state machines
- cmos technology
- power saving
- high speed
- energy efficiency
- design methodology
- low cost
- field programmable gate array
- multithreading
- computing systems
- input output
- fine grained
- object oriented
- nm technology