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A Time-Area-Power Efficient Multiplier and Square Architecture Based on Ancient Indian Vedic Mathematics.
Himanshu Thapliyal
Hamid R. Arabnia
Published in:
ESA/VLSI (2004)
Keyphrases
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real time
cost effective
efficient implementation
knowledge base
pattern recognition
computer science
management system
computationally expensive
low power
hardware implementation
neural network
computationally efficient
software architecture
data flow