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A VLSI architecture for cellular automata based parallel data compression.
Subarna Bhattacharjee
J. Bhattacharya
U. Raghavendra
Debashis Saha
Parimal Pal Chaudhuri
Published in:
VLSI Design (1996)
Keyphrases
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data compression
vlsi architecture
vlsi implementation
low complexity
low power
real time
compressed data
compression algorithm
wavelet filters
compression ratio
low cost