SAT-based Unbounded Model Checking of Timed Automata.
Wojciech PenczekMaciej SzreterPublished in: Fundam. Informaticae (2008)
Keyphrases
- timed automata
- model checking
- bounded model checking
- temporal logic
- formal verification
- reachability analysis
- formal specification
- planning domains
- computation tree logic
- model checker
- symbolic model checking
- linear temporal logic
- temporal properties
- automated verification
- verification method
- transition systems
- pspace complete
- epistemic logic
- asynchronous circuits
- answer set programming
- formal methods
- planning problems
- deterministic finite automaton
- reactive systems
- machine learning
- modal logic
- optimal policy