Login / Signup
High level area, delay and power estimation for FPGAs.
Tianyi Jiang
Xiaoyong Tang
Prithviraj Banerjee
Published in:
FPGA (2004)
Keyphrases
</>
high level
low level
accurate estimation
real time
semantic information
image processing
signal processing
higher level
estimation error
estimation algorithm
maximum likelihood estimation
robust estimation