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Logistic Map Pseudo Random Number Generator in FPGA.
Mateo Jalen Andrew Calderon
Lee Jun Lei Lucas
Syarifuddin Azhar Bin Rosli
Stephanie See Hui Ying
Jarell Lim En Yu
Maoyang Xiang
Tee Hui Teo
Published in:
CoRR (2024)
Keyphrases
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random number generator
random number
real time
high speed
maximum a posteriori
computer vision
logistic regression
fingerprint authentication
dedicated hardware
hardware implementation
low cost
signal processing
hardware design
mobile robot
image segmentation
decision trees
verilog hdl