Embedding pyramids in array processors with pipelined busses.
Zicheng GuoRami G. MelhemPublished in: ASAP (1990)
Keyphrases
- linear array
- processing elements
- parallel architecture
- parallel algorithm
- multiresolution
- processor array
- parallel processing
- parallel processors
- vector space
- high performance computing
- robust image watermarking
- data hiding
- data flow
- high end
- coarse to fine
- multiprocessor systems
- image pyramids
- parallel computing
- nonlinear dimensionality reduction
- image representation
- computer systems
- parallel execution
- multithreading
- programmable logic
- signal processing
- embedded processors
- high speed
- neural network