Hardware implementation of the Smith-Waterman algorithm using a systolic architecture.
Juan M. Marmolejo-TejadaVladimir Trujillo-OlayaClaudia Patricia Renteria-MejiaJaime Velasco-MedinaPublished in: LASCAS (2014)
Keyphrases
- hardware implementation
- fpga implementation
- software implementation
- pipeline architecture
- hardware architecture
- optimal solution
- image processing algorithms
- dynamic programming
- signal processing
- efficient implementation
- hardware design
- parallel architecture
- pipelined architecture
- dedicated hardware
- data structure
- fractal encoding
- neural network
- general purpose
- data streams
- fpga device
- machine learning