Low power multi-lane MIPI CSI-2 receiver design and hardware implementations.

Yueh-Chuan Lu Zong-Yi Chen Pao-Chi Chang

Published in: ISCE (2013)

Keyphrases

low power
single chip
power consumption
low cost
low power consumption
high speed
logic circuits
vlsi architecture
gate array
cmos technology
digital signal processing
mixed signal
power dissipation
power reduction
vlsi circuits
ultra low power
design process