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A 20 Gb/s 1: 4 DEMUX Without Inductors and Low-Power Divide-by-2 Circuit in 0.13 µm CMOS Technology.
Byung-Guk Kim
Lee-Sup Kim
Sangjin Byun
Hyun-Kyu Yu
Published in:
IEEE J. Solid State Circuits (2008)
Keyphrases
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cmos technology
low power
high speed
power consumption
low cost
low voltage
single chip
power dissipation
logic circuits
mixed signal
low power consumption
real time
digital signal processing
gate array
delay insensitive
power reduction
image sensor
frame rate
motion estimation