Virtual channel router architecture for Network on Chip with adaptive inter-port buffers sharing.

Manel Langar Riad Bourguiba Jaouhar Mouine

Published in: SSD (2016)

Keyphrases

network on chip
routing algorithm
multi processor
network simulator
packet switched
data transfer
multi channel
power dissipation
single processor
shortest path
interconnection networks
multipath
ad hoc networks
multi hop
program execution
shared memory
real time