A Highly Pipelined and Highly Parallel VLSI Architecture of CABAC Encoder for UHDTV Applications.
Chen FuHeming SunZhiqiang ZhangJinjia ZhouPublished in: Sensors (2023)
Keyphrases
- highly parallel
- vlsi architecture
- low complexity
- low power
- single chip
- coding efficiency
- vlsi implementation
- efficient implementation
- rate distortion
- mode decision
- real time
- bit rate
- video coding
- parallel architectures
- computing systems
- low cost
- motion estimation
- high speed
- video compression
- single pass
- parallel programming
- motion compensation
- power consumption
- image coding
- data flow
- video codec
- distributed video coding
- video quality
- graphics processing units
- macroblock
- motion vectors
- general purpose
- image processing