Login / Signup
High Reliability Soft Error Hardened Latch Designfor Nanoscale CMOS Technology using PVT Variation.
T. Dhanushya
T. Latha
Published in:
Wirel. Pers. Commun. (2023)
Keyphrases
</>
high reliability
low power
low cost
cmos technology
power consumption
high speed
high precision
flip flops
spl times
low voltage
digital signal processing
power dissipation
hardware and software
mixed signal
real time
embedded systems
digital camera
silicon on insulator
image sensor
image analysis
image processing