A low-voltage 3 mW 10-bit 4MS/s pipeline ADC in digital CMOS for sensor interfacing.
Bruno VazJoão GoesR. PilotoJ. NetoRui MonteiroNuno PaulinoPublished in: ISCAS (4) (2005)
Keyphrases
- analog to digital converter
- low voltage
- mixed signal
- power consumption
- cmos technology
- low power
- power management
- random access memory
- cmos image sensor
- power line
- image sensor
- design considerations
- multi channel
- data acquisition
- low cost
- digital signal processing
- power dissipation
- image processing
- energy saving
- hardware and software
- cost effective