Statistical estimation of delay in nano-scale CMOS circuits using Burr Distribution.
Amirhossein MoshrefiHossein AghababaOmid ShoaeiPublished in: Microelectron. J. (2018)
Keyphrases
- design methodology
- power dissipation
- statistical estimation
- nano scale
- chip design
- cmos technology
- analog vlsi
- vlsi circuits
- logic circuits
- high speed
- delay insensitive
- circuit design
- data distribution
- image segmentation
- uniformly distributed
- power consumption
- low voltage
- low cost
- neural network
- real time
- analog circuits
- spatial distribution
- random variables