A digitally self-calibrating 14-bit 10-MHz CMOS pipelined A/D converter.
Shang-Yuan (Sean) ChuangTerry L. SculleyPublished in: IEEE J. Solid State Circuits (2002)
Keyphrases
- analog to digital converter
- low voltage
- random access memory
- cmos technology
- high speed
- nm technology
- low power
- power consumption
- image sensor
- flip flops
- data flow
- cmos image sensor
- high frequency
- instruction set architecture
- neural network
- mixed signal
- power dissipation
- design considerations
- low cost
- fpga device
- linear array
- power supply