HLS-based dataflow hardware architecture for Support Vector Machine in FPGA.
Mohammad Amir MansooriMario R. CasuPublished in: ISCAS (2022)
Keyphrases
- hardware architecture
- support vector machine
- field programmable gate array
- parallel computing
- hardware implementation
- hardware architectures
- xilinx virtex
- svm classifier
- data flow
- training data
- support vector
- associative memory
- feature selection
- design methodology
- kernel methods
- machine learning
- feature vectors
- artificial intelligence
- color space
- hardware design
- block matching motion estimation
- computing systems
- kernel function
- knn
- massively parallel
- image processing
- real time