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Boolean matching for LUT-based logic blocks with applications toarchitecture evaluation and technology mapping.
Jason Cong
Yean-Yow Hwang
Published in:
IEEE Trans. Comput. Aided Des. Integr. Circuits Syst. (2001)
Keyphrases
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multi valued
boolean logic
case study
real valued
pattern matching
cost effective
evaluation method
key technologies
multiscale
classical logic
binary images
evaluation model
matching scheme
schema matching
defeasible logic
semantic matching
neural network