Login / Signup
An Efficient Embryonic Hardware Architecture based on Network-on-Chip.
Kasem Khalil
Omar Eldash
Bappaditya Dey
Ashok Kumar
Magdy A. Bayoumi
Published in:
MWSCAS (2021)
Keyphrases
</>
hardware architecture
network on chip
hardware implementation
hardware architectures
associative memory
fine grained
routing algorithm
field programmable gate array
network simulator