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An Efficient Embryonic Hardware Architecture based on Network-on-Chip.

Kasem KhalilOmar EldashBappaditya DeyAshok KumarMagdy A. Bayoumi
Published in: MWSCAS (2021)
Keyphrases
  • hardware architecture
  • network on chip
  • hardware implementation
  • hardware architectures
  • associative memory
  • fine grained
  • routing algorithm
  • field programmable gate array
  • network simulator