On the effects of ring oscillator length and hardware Trojan size on an FPGA-based implementation of AES.
Filippos PirpilidisKyriakos G. StefanidisArtemios G. VoyiatzisParis KitsosPublished in: Microprocess. Microsystems (2017)
Keyphrases
- hardware implementation
- hardware architecture
- hardware design
- graphics cards
- advanced encryption standard
- hardware architectures
- low cost
- hardware and software
- real time
- dedicated hardware
- software implementation
- field programmable gate array
- maximum number
- smart camera
- vlsi implementation
- parallel implementation
- embedded systems
- efficient implementation
- high level language
- total length
- fpga technology
- image processing algorithms
- computer systems
- general purpose
- wireless sensor networks
- computational complexity