Maestro: A Memory-on-Logic Architecture for Coordinated Parallel Use of Many Systolic Arrays.
H. T. KungBradley McDanelSai Qian ZhangXin DongChih-Chiang ChenPublished in: ASAP (2019)
Keyphrases
- single processor
- multi processor
- parallel processors
- processing elements
- linear array
- cooperative
- compute intensive
- systolic array
- real time
- reasoning engine
- memory hierarchy
- parallel architecture
- computing power
- modal logic
- logic programming
- management system
- multi agent
- random access memory
- level parallelism
- embedded dram
- memory management
- hardware architecture
- distributed processing
- classical logic
- memory space
- data flow
- hardware implementation
- neural network