A Low Latency Hardware Implementation Architecture for Polar Code.
Minnan LiuChaofan ChenYongfeng MaPublished in: ICCT (2019)
Keyphrases
- hardware implementation
- low latency
- hardware architecture
- dedicated hardware
- software implementation
- fpga implementation
- signal processing
- parallel architecture
- efficient implementation
- pipeline architecture
- hardware design
- high bandwidth
- high speed
- real time
- image processing algorithms
- field programmable gate array
- high throughput
- pipelined architecture
- highly efficient
- fpga technology
- source code
- stream processing
- virtual machine
- fpga device
- memory management
- general purpose processors
- mobile nodes
- low complexity
- software systems
- low cost
- sensor networks
- database systems
- image processing