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A hardware accelerated framework for the generation of design validation programs for SMT processors.
Danilo Ravotto
Ernesto Sánchez
Matteo Sonza Reorda
Published in:
DDECS (2010)
Keyphrases
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conceptual framework
main contribution
parallel processing
design principles
computational framework
database
building blocks
software architecture
architectural design
automatic programming
information systems
expert systems
user interface
theoretical framework
conceptual model