Low Power Multiplier with Bypassing and Tree Strucuture.
Ko-Chi KuoChi-Wen ChouPublished in: APCCAS (2006)
Keyphrases
- low power
- high speed
- power consumption
- low cost
- tree structure
- high power
- digital signal processing
- wireless transmission
- single chip
- vlsi circuits
- low power consumption
- vlsi architecture
- image sensor
- logic circuits
- floating point
- index structure
- gate array
- general purpose
- mixed signal
- cmos technology
- signal processor
- motion estimation