A hardware implementation of the Compact Genetic Algorithm.
Chatchawit AporntewanPrabhas ChongstitvatanaPublished in: CEC (2001)
Keyphrases
- hardware implementation
- genetic algorithm
- efficient implementation
- signal processing
- dedicated hardware
- software implementation
- hardware design
- hardware architecture
- field programmable gate array
- pipeline architecture
- image processing algorithms
- fitness function
- fpga implementation
- binary strings
- image binarization
- parallel architecture
- evolutionary algorithm
- real time
- genetic algorithm ga
- simulated annealing
- general purpose
- multi objective
- computer vision
- memory management
- neural network