Design of FPGA High-Speed Paralleling M Sequence.

Zhi-Song Hao Zhi Ming Zheng Rui-Liang Song

Published in: CSPS (2017)

Keyphrases

high speed
hardware design
verilog hdl
building blocks
design process
computer aided
low power
neural network
single chip
design methodology
engineering design
user interface
user experience
software architecture
optimal design
image processing
real time image processing
programmable logic
database