Low Power Neural Network Accelerators Using Collaborative Weight Tuning and Shared Shift-Add optimization.
Kwondo MaMohamed MejriChandramouli N. AmarnathAbhijit ChatterjeePublished in: MWSCAS (2022)
Keyphrases
- low power
- single chip
- neural network
- high speed
- low cost
- power consumption
- high power
- wireless transmission
- low power consumption
- vlsi architecture
- digital signal processing
- logic circuits
- cmos technology
- real time
- image sensor
- pattern recognition
- vlsi circuits
- ultra low power
- fuzzy neural network
- general purpose
- power reduction
- delay insensitive