A low jitter 50Gb/s PAM4 CDR of Receiver in 40nm CMOS Technology.

Mengshuai Wang Yingmei Chen Jinlei Yuan

Published in: WCSP (2020)

Keyphrases

cmos technology
low power
high speed
low voltage
parallel processing
spl times
power consumption
silicon on insulator
power dissipation
real time
low cost
image sensor
computer vision
video sequences
flip flops