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Functional lower bounds for restricted arithmetic circuits of depth four.
Suryajith Chillara
Published in:
CoRR (2021)
Keyphrases
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lower bound
upper bound
branch and bound algorithm
branch and bound
high speed
objective function
np hard
optimal solution
worst case
depth information
lower and upper bounds
depth map
vc dimension
upper and lower bounds
circuit design
logic circuits
logic synthesis
arithmetic operations
delay insensitive