RAR-NoC: A reconfigurable and adaptive routable Network-on-Chip for FPGA-based multiprocessor systems.
Jens RettkowskiDiana GöhringerPublished in: ReConFig (2014)
Keyphrases
- network on chip
- multiprocessor systems
- routing algorithm
- interconnection networks
- multi processor
- network simulator
- distributed memory
- hardware implementation
- packet switched
- fault tolerant
- power dissipation
- field programmable gate array
- low cost
- data transfer
- access patterns
- wireless sensor networks
- single processor
- parallel algorithm
- shared memory
- parallel computers
- website
- embedded systems
- message passing
- ad hoc networks
- multistage
- energy consumption
- image segmentation
- web services