Bridging the Gap between Design and Verification of Embedded Systems in Model Based System Engineering: A Meta-model for Modeling Universal Verification Methodology (UVM) Test Benches.
Muhammad Waseem AnwarShumaila QamarFarooque AzamWasi Haider ButtMuhammad RashidPublished in: ICCMS (2020)
Keyphrases
- embedded systems
- metamodel
- modeling language
- uml profile
- software systems
- model driven
- design methodology
- hw sw
- low cost
- formal methods
- embedded software
- safety critical
- computing power
- design process
- embedded devices
- processing power
- design patterns
- resource limited
- model checking
- real time systems
- development processes
- hardware software
- reference model
- data model
- artificial intelligence
- business process modeling
- real world
- black box
- database systems
- design rationale
- development process
- software engineering
- information technology
- reinforcement learning
- databases
- embedded real time systems