C-based hardware-accelerator coprocessing for SOC an quantitative area-performance evaluation.
Zhoukun WangOmar HammamiPublished in: ICECS (2008)
Keyphrases
- graphics processors
- hardware and software
- parallel computation
- data transfer
- gpu implementation
- embedded systems
- parallel algorithm
- field programmable gate array
- parallel implementation
- real time
- highly optimized
- hardware software co design
- low cost
- graphics processing units
- hardware implementation
- computer systems
- single instruction multiple data
- computing systems
- low power
- data structure
- memory resident
- databases
- hardware architecture