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A CT ΔΣ ADC with 9/50MHz BW achieving 73/71dB DR designed for robust blocker tolerance in 14nm FinFET.

Francesco ConzattiLukas DörrerPatrick TortaClaus KropfDirk PatzoldJacinto San Pablo GarciaVenerando RallosNorbert Schembera
Published in: ESSCIRC (2017)
Keyphrases
  • ct images
  • computationally efficient
  • three dimensional
  • high speed
  • computer aided
  • computer vision
  • control system
  • high frequency
  • robust estimation
  • cmos technology