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Channel width tapering of serially connected MOSFET's with emphasis on power dissipation.
Brian S. Cherkauer
Eby G. Friedman
Published in:
IEEE Trans. Very Large Scale Integr. Syst. (1994)
Keyphrases
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power dissipation
power consumption
low power
power reduction
cmos technology
multi channel
digital signal processing
chip design
design methodology
nm technology
network on chip
logic circuits
energy efficiency
high speed
image segmentation
pattern matching
signal processing
pattern recognition
flip flops
real time