Partitioning VLSI Floorplans by Staircase Channels for Global Routing.

Subhashis Majumder Subhas C. Nandy Bhargab B. Bhattacharya

Published in: VLSI Design (1998)

Keyphrases

routing algorithm
signal processing
high speed
routing protocol
network topology
multi channel
partitioning algorithm
neural network
case study
sensor networks
shortest path
wireless ad hoc networks
vlsi implementation