Login / Signup
A two-dimension half-select free 12T SRAM cell with enhanced write ability and read stability for bit-interleaving architecture.
Jialu Yin
Jia Yuan
Zhi Li
Shushan Qiao
Published in:
IEICE Electron. Express (2022)
Keyphrases
</>
random access memory
read write
design considerations
management system
embedded dram
data sets
selection algorithm
real time
software architecture
power consumption
data transmission
multi dimensional
memory access
cmos technology
hard disk