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A Low Phase Noise Injection-Locked Programmable Reference Clock Multiplier With a Two-Phase PVT-Calibrator for ΔΣ PLLs.
Yongsun Lee
Mina Kim
Taeho Seong
Jaehyouk Choi
Published in:
IEEE Trans. Circuits Syst. I Regul. Pap. (2015)
Keyphrases
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general purpose
high speed
power consumption
convex optimization
hardware implementation
high levels
database
neural network
real world
probabilistic model
reference frame
floating point
interior point methods