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Coupling latency-insensitivity with variable-latency for better than worst case design: a RISC case study.
Mario R. Casu
Stefano Colazzo
Paolo Mantovani
Published in:
ACM Great Lakes Symposium on VLSI (2011)
Keyphrases
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case study
design process
worst case
neural network
low latency
lower bound
upper bound
computer aided
error bounds
prefetching
real world
software engineering
general purpose
approximation algorithms
low power consumption