A Fast Algorithm and Its VLSI Architecture for Fractional Motion Estimation for H.264/MPEG-4 AVC Video Coding.
Y.-J. WangC.-C. ChengTian-Sheuan ChangPublished in: IEEE Trans. Circuits Syst. Video Technol. (2007)
Keyphrases
- vlsi architecture
- avc video coding
- motion estimation
- intra prediction
- video coding standard
- mode decision
- low complexity
- coding efficiency
- motion vectors
- video coding
- motion compensation
- video compression
- motion compensated
- macroblock
- video sequences
- rate control
- inter frame
- rate distortion
- compressed video
- compressed domain
- motion field
- image sequences
- vlsi implementation
- reference frame
- bit rate
- computational complexity
- real time
- low power
- super resolution
- video codec
- video streaming
- computer vision
- high definition
- video quality
- distributed video coding
- image coding
- error propagation
- spatial domain
- optical flow
- prediction error
- bit plane
- block size
- multimedia
- video transmission
- video objects
- coding method
- video data
- high quality
- error concealment