Layout-Accurate Design and Implementation of a High-Throughput Interconnection Network for Single-Chip Parallel Processing.
Aydin O. BalkanMichael N. HorakGang QuUzi VishkinPublished in: Hot Interconnects (2007)
Keyphrases
- parallel processing
- high throughput
- single chip
- cmos image sensor
- parallel computers
- low power
- microarray
- low cost
- computer architecture
- interconnection networks
- cmos technology
- parallel architecture
- data acquisition
- high quality
- efficient implementation
- pairwise
- parallel implementation
- fault tolerant
- data processing
- high speed