A novel design of low power double edge-triggered flip-flop.
Chien-Cheng YuKuan-Ting ChenPublished in: BMEI (2012)
Keyphrases
- low power
- power dissipation
- power consumption
- single chip
- cmos technology
- low cost
- digital signal processing
- logic circuits
- low power consumption
- high speed
- vlsi architecture
- gate array
- power reduction
- high power
- mixed signal
- cmos image sensor
- computer vision
- ultra low power
- design methodology
- image sensor
- vlsi circuits
- flip flops
- nm technology
- design process
- image processing