assignment technique for low power nanoscale CMOS design.
Sudhakar S. MandeSaurabh A. ChandorkarA. N. ChandorkarPublished in: Microelectron. Reliab. (2011)
Keyphrases
- low power
- power consumption
- single chip
- low cost
- low power consumption
- high speed
- cmos technology
- vlsi architecture
- mixed signal
- power dissipation
- ultra low power
- logic circuits
- digital signal processing
- vlsi circuits
- nm technology
- gate array
- high power
- cmos image sensor
- power reduction
- design process
- multi channel
- real time
- wireless transmission
- embedded systems
- design methodology
- dynamic range