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A Low-Power DNN Accelerator Enabled by a Novel Staircase RRAM Array.
Hasita Veluri
Umesh Chand
Yida Li
Baoshan Tang
Aaron Voon-Yew Thean
Published in:
IEEE Trans. Neural Networks Learn. Syst. (2023)
Keyphrases
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low power
low cost
image sensor
high speed
power consumption
wireless transmission
single chip
focal plane
vlsi circuits
vlsi architecture
low power consumption
logic circuits
digital signal processing
cmos technology
parallel implementation
high power
power dissipation
mixed signal
hardware and software
real time