A 24b 2MS/s SAR ADC with 0.03ppm INL and 106.3dB DR in 180nm CMOS.
Jesper SteensgaardRichard ReayRaymond PerryDave ThomasGeoffrey TuGeorge ReitsmaPublished in: ISSCC (2022)
Keyphrases
- analog to digital converter
- cmos technology
- silicon on insulator
- nm technology
- metal oxide semiconductor
- synthetic aperture radar
- low power
- high speed
- single chip
- sar images
- low cost
- power consumption
- parameter estimation
- generalization capabilities
- sea ice
- image sensor
- power supply
- neural learning
- automatic target recognition
- cmos image sensor
- delay insensitive
- sar imagery
- power dissipation
- database
- parallel processing
- multiple sclerosis
- low voltage
- analog vlsi
- sigma delta
- circuit design
- compression algorithm
- image quality
- learning algorithm