A Framework for Hardware-in-the-Loop Testing of an Integrated Architecture.

Martin Schlager Roman Obermaisser Wilfried Elmenreich

Published in: SEUS (2007)

Keyphrases

real time
main contribution
software architecture
management system
reference model
image processing
low cost
probabilistic model
conceptual model
hardware implementation
processing units
distributed architecture
heterogeneous systems
vlsi implementation
pipeline architecture