A Digitized Replica Bitline Delay Technique for Random-Variation-Tolerant Timing Generation of SRAM Sense Amplifiers.
Yusuke NikiAtsushi KawasumiAzuma SuzukiYasuhisa TakeyamaOsamu HirabayashiKeiichi KushidaFumihiko TachibanaYuki FujimuraTomoaki YabePublished in: IEEE J. Solid State Circuits (2011)